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REFERENCE FOLDING SUBRANGING CALIPER ADC

Roberto Lojacono, Arianna Mencattini, Marcello Salmeri, Silvia Sangiovanni
  • Abstract:
    The paper presents a reduced ADC architecture obtained by introducing the subranging technique into the scheme of a caliper AD converter. This last converter was already proposed as an application of a theory which describes the comparison between scales having the steps prime each other. This converter architecture drastically reduces the number of the required resistors for a full flash realization. The introduction of the subranging technique into the caliper ADC here presented reduces also the number of the required comparators. The result is a very compact architecture. The paper describes a first intention architecture based on ideal components. An example of SPICE simulation is given.
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  • DOI:
    _unreg_iwadc-2007.066

Event details:

  • IMEKO TC:
    TC4
  • Event name:
    IWADC 2007
  • Title:

    12th IMEKO TC4 International Workshop on ADC Modeling and Testing IWADC (together with XVth IMEKO TC4 International Symposium on Novelties in Electrical Measurements and Instrumentation) (IWADC)

  • Place:
    Iasi, ROMANIA
  • Time:
    19 September 2007 - 21 September 2007